{"id":3313,"date":"2022-07-13T09:30:00","date_gmt":"2022-07-13T07:30:00","guid":{"rendered":"https:\/\/cirpicme.org\/?page_id=3313"},"modified":"2022-07-26T13:07:29","modified_gmt":"2022-07-26T11:07:29","slug":"time-domain-reflectometry-for-automated-failure-analysis-in-power-transistors","status":"publish","type":"page","link":"https:\/\/cirpicme.org\/index.php\/quality-metrology-testing\/time-domain-reflectometry-for-automated-failure-analysis-in-power-transistors\/","title":{"rendered":"Time-Domain Reflectometry for Automated Failure Analysis in Power Transistors"},"content":{"rendered":"\n

by Kanuj Sharma, Simon Kamm, Valentyna Afansenko, Kevin Munoz Baron, Ingmar Kallfass (Germany)<\/em><\/p>\n\n\n\n

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Abstract<\/strong><\/p>\n\n\n\n

This paper presents an approach to automate the failure analysis of silicon-carbide power transistors via time-domain reflectometry while considering different calibration parameters to improve the accuracy of the measurement in the manufacturing process. The TDR measurements and theoretical analysis are performed on a commercially available silicon-carbide power transistor. The supporting simulation model is based on a reinforcement learning approach where simulation data is generated by co-simulation of MATLAB and ADS to efficiently train a machine learning model using the deep reinforcement learning approach. The proposed approach can be used in Industry4.0 processes since it can differentiate all hard and soft failures while considering the rise-time of the input step signal which is normally not considered in the conventional TDR mathematical formulae. The proposed method is implemented by extracting the parasitic parameters of the power transistor and using the data as an initial starting point for the deep neural network with an award-based reinforcement learning agent for the failure analysis.<\/p>\n\n\n\n

Keywords<\/strong>: Silicon carbide; TDR; Reinforcement learning; Deep neural network; Failure analysis<\/p>\n\n\n\n

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Video presentation<\/strong><\/p>\n\n\n\n